Existing device build processes may suffer from various limitations, such as a difficulty in building a multi-layer structure which employs a plurality of integration processes, for example mid-build of a process flow, to create an end device. In addition, existing processes may exhibit undesired challenges in defining the location, in the plane of the fabrication or substrate, of two or more materials, which may be non-insulative, in the same layer of a multi-layer structure. Further, providing integration of magnetic materials into a multi-layer build process, for example to fabricate an electromagnetic structure, may be a limitation of existing device build processes. Moreover, leveraging various approaches and/or applications may remain problematic in current device build processes, where, for example, multiple materials may need to be integrated hybridly and/or monolithically into a mixed material structure.
Moreover, power supply on chip (PSoC) is a concept that is generating a lot of interest because of the current industry drive towards miniaturization and higher efficiency. For this to happen, switching frequencies must increase, enabling the inductors and the capacitors within the power supply to shrink. As the switching frequency increases above 0.5 MHz for switch mode power supplies ferromagnetic materials show more promise than ferrite materials because of greater saturation flux density and lower losses, as can be seen in FIG. 15. For this to be the case, the thickness of the ferromagnetic films must be on the order of a skin depth, but for high flux densities, the loss is 4 to 5 times higher in the ferrite material—clearly indicating the advantage of properly engineered ferromagnetic materials for high-power-density applications. A value for total magnetic core thickness on the order of 10 s or 100 s of microns is desirable to achieve low-loss coils.
Therefore, a need exists for processes, and devices thereof, which may include one or more of: releasability from a handle wafer; CMOS process compatibility; ability to be produced on a variety of substrate materials; flexible passivation coating options; integration of thin-film and/or solders; interconnection to wafer surface microelectronics; and/or, an ability to micromachine a substrate wafer. More particularly, a need exists for versatile processes, and/or devices thereof, which may be applicable to magnetic and electro-magnetic MEMS and/or relatively small-scale applications, such as in the context of the multi-layer build process.